Verilog RAM Module Design

I need a Verilog-HDL RAM module that meets an already defined specification. The core requirement is a synchronous memory unit with reliable read/write control. Beginning from the RTL, I want clean, synthesizable... (Budget: $10 - $30 USD, Jobs: Debugging, Digital Design, Electrical Engineering, Electronics, FPGA, Microcontroller, Simulation, Verilog / VHDL)