Weekly SoC DV Mentorship

I run a complex System-on-Chip project and reserve about four hours each week for focused progress. During that window I rely on an experienced engineer who can jump straight into SystemVerilog / UVM code and keep our verification flow tight... (Budget: ₹750 - ₹1250 INR, Jobs: Coding, Debugging, Digital Design, Engineering, FPGA, Simulation, SoC Design, Software Development)