RVLDG Paper Replication and Optimization -- 2

Replicate the reference RVLDG paper exactly in Cadence Virtuoso using 90nm CMOS technology and then develop a novel optimized version with minimum Power Delay Product (PDP). The final work must be suitable... (Budget: ₹2000 - ₹4000 INR, Jobs: Circuit Design, Electrical Engineering, Electronics, Engineering, Verilog / VHDL)